Felicity Solar · Home battery
FLB48314TG1 / FLB48100 / LPBF48 / LPBA48 LiFePO4 battery Modbus register map
Default configuration
- Protocol
- RS485
- Port
- 502
- Unit ID
- 1
- Addressing
- 0-based
- Byte order
- Big endian
- Word order
- High word first
- Baud rate
- 9600
- Parity
- None
- Data bits
- 8
- Stop bits
- 1
This device has an RS-485 interface. Reach it through a Modbus RTU-to-TCP gateway, configured with the factory serial settings above.
Register map
| Address | Count | Name | Type | Unit | Scale | Access |
|---|---|---|---|---|---|---|
| 1 | 1 | Protocol type Voltronic LIB protocol frame; every pack answers the same holding-register block. | UInt16 | - | 1 | R |
| 2 | 1 | Protocol version Document default 0. | UInt16 | - | 1 | R |
| 16 | 1 | Number of cells Cells beyond this count read 0. | UInt16 | - | 1 | R |
| 37 | 1 | Number of temperature sensors | UInt16 | - | 1 | R |
| 38 | 1 | Temperature sensor 1 Raw 3012 = 28.05 degC: degC = raw / 10 - 273.15. Sensor 6 is the MOSFET sensor; unused sensors read 0. | UInt16 | K | 0.1 | R |
| 39 | 1 | Temperature sensor 2 degC = raw / 10 - 273.15. | UInt16 | K | 0.1 | R |
| 40 | 1 | Temperature sensor 3 degC = raw / 10 - 273.15. | UInt16 | K | 0.1 | R |
| 48 | 1 | Charge current 0 while the pack is discharging. Verified as 0.1 A units (raw 19 = 1.9 A on the discharge register). | UInt16 | A | 0.1 | R |
| 49 | 1 | Discharge current Signed in the source (s16, 0.1 A); the pack reports negative while discharging and the source says to use the absolute value. Temperature rows use degC = raw / 10 - 273.15. | Int16 | A | 0.1 | R |
| 50 | 1 | Pack voltage Felicity firmware reports millivolts (53400 = 53.400 V); the Voltronic document says 0.1 V. The verified scale is used. | UInt16 | V | 0.001 | R |
| 51 | 1 | State of charge | UInt16 | % | 1 | R |
| 52 | 2 | Full-charge capacity High word first; 0x0005 0x5730 = 350000 mAh. | UInt32 | Ah | 0.001 | R |
| 54 | 1 | Packs online Number of packs answering on the bus. | UInt16 | - | 1 | R |
| 55 | 1 | Charge alarm Bit field: b0 CHT (charge high temperature), b1 COV (cell over-voltage), b2 CLT (charge low temperature), b3 OCC (over-current charging). | Hex | - | 1 | R |
| 56 | 1 | Discharge alarm Bit field: b0 DHT, b1 DLT, b2 FETHT, b3 CUV. | Hex | - | 1 | R |
| 57 | 1 | Charge protection status Bit field: b0 PRES, b1 BoostNRDY, b2 AFEComm, b3 AFEOCC, b4 AFEOCD, b5 AFESCD, b6 FETHT, b7 SUV, b8 CHT, b9 CLT, b10 OCV, b11 OCC, b12 2NDOVP, b13 CANID, b15 OCC2. | Hex | - | 1 | R |
| 58 | 1 | Charge protection status 2 Bit field: b0 ShutdownByCmd, b1 Shutdown, b2 OCCHw, b3 IDError. | Hex | - | 1 | R |
| 59 | 1 | Discharge protection status Bit field: b0 PRES, b1 BoostNRDY, b2 AFEOCC, b3 AFEOCD, b4 AFESCD, b6 IDError, b10 FETHT, b11 CUV, b12 OCD, b13 DLT, b14 DHT, b15 Shutdown. | Hex | - | 1 | R |
| 60 | 1 | Discharge protection status 2 Bit field: b0 AFEComm, b1 Short, b2 OCD2, b4 2NDOVP, b5 DHT2, b6 ShutdownByCmd, b13 CANID. | Hex | - | 1 | R |
| 61 | 1 | BMS state Reserved, reads 0 in the documented firmware. | UInt16 | - | 1 | R |
| 62 | 2 | Design capacity High word first. | UInt32 | Ah | 0.001 | R |
| 112 | 1 | Charge voltage limit Raw 576 = 57.6 V. | UInt16 | V | 0.1 | R |
| 113 | 1 | Discharge voltage limit Raw 480 = 48.0 V. | UInt16 | V | 0.1 | R |
| 114 | 1 | Charge current limit Raw 320 / 400 / 480 = 32 / 40 / 48 A; differs per pack model. | UInt16 | A | 0.1 | R |
| 115 | 1 | Discharge current limit Raw 1600 = 160 A. | UInt16 | A | 0.1 | R |
| 116 | 1 | Charge / discharge status b7 charge enable, b6 discharge enable, b5 charge immediately (SOC <= 9 %), b4 charge immediately 2 (SOC 10-14 %), b3 full-charge request, b2 small-current charge request. Observed 0xC0 when idle. | Hex | - | 1 | R |
| 117 | 1 | Run time to empty | UInt16 | min | 1 | R |
| 118 | 2 | Remaining capacity High word first. | UInt32 | Ah | 0.001 | R |
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Notes
Secondary source (community document, not a vendor publication): "Felicity Solar LiFePO4 battery - RS485 register map" by Krzysztof Hajdamowicz, 2026-10-10, https://github.com/KrzysztofHajdamowicz/felicity-battery-modbus/blob/main/docs/felicity-battery-registers.pdf (human-readable protocol notes in docs/protocol.md of the same repository). It documents the Voltronic "LIB" BMS protocol as implemented by the Felicity FLB48314TG1 and the FLB48100 / LPBF48 / LPBA48 family, Modbus RTU 9600 8N1 at pack address 1 in its example frame, function 0x03, and states which rows are hardware-verified and which come from the Voltronic document. The source gives no factory pack address, so the unit 1 recorded here is a placeholder, not a cited value, and the user must set their pack's own address. Deliberate omissions: the cell-voltage array (17-36) and the per-module state arrays (64-105) - the point descriptions there are shifted against their register numbers in the source, so the rows could not be paired with confidence; and the BMS firmware/hardware version pair (3-6), whose encoding the source leaves open. Voltronic's error frames replace the Modbus byte count with a 16-bit register count, so a standard client rejects them; this affects error handling only, not the map. One master per bus, at least 500 ms between polls of a pack.